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- Design Engineer/Semiconductor ASIC SoC
JOB ID 24580
Design Engineer/Semiconductor ASIC SoC
- Manufacturer, Semiconductor
- Electronics, Circuit & Mounting Design
- Kanagawa
- ¥6,000,000~¥10,000,000
Established in 2005 as a Japanese subsidiary with global operations including headquarters in Taiwan, the U.S., Europe, Korea, and China.
With the strength of being the No. 1 semiconductor group company in Taiwan, the Japanese teamwork and cohesiveness, and uncompromising cutting-edge development technology, we are leading the global ASIC/SoC industry.
You will be responsible for the design, development, and mass production of semiconductor components (ASICs / SoCs) that are the engine of products released by product manufacturers.
We can work directly with the product developers of these companies to develop fascinating future products together.
We are the No.1 semiconductor group company in Taiwan and the only “semiconductor product and design development manufacturer”, and will take the lead in the world to develop customized semiconductors using the latest technology.
We also possess advanced failure detection technology to ensure a stable supply of semiconductor chips to product manufacturers, and are highly trusted worldwide.
As an engineer, you will be able to be involved in the business while working with your hands, and you will have a sense of accomplishment when something you have developed is launched on the market!
Job Description
-
- Responsibilities
- Front-End Engineer
- RTL to Logic Synthesis & Formal Verification
- Acceptance check of Netlist/SDC/UPF, CPF, Library, etc. accepted from customers
- STA (Execution & Analysis & Modification, Timing Analysis & Timing Convergence Strategy Planning, etc.)
- Propose STA constraint improvement & modification, etc.
Circuit improvement proposals to customers (for low power consumption, high speed, small size, etc.)
■Middle-End Engineers
- TEST circuit insertion using DFT tools (Scan, MemoryBIST, BoundaryScan, LogicBIST, IP-DFT, etc.)
- DFTTiming constraint creation & checking
- DFT circuit validity check (simulation, etc.)
Yield improvement measures study
Back-End Engineers
- Layout Design (Floorplan - Placement - CTS - Routing - Timing Convergence - PV Convergence)
- Pin-Assignment (External Terminals, Ball-Pin, etc.), BUMP Design, RDL
- STA Result Analysis & Timing Convergence
- Power Supply Routing Structure Study & Power Mesh Wiring
・PhysicalVerification (DRC, LVS, etc.)
・IR-drop Analysis & Convergence
-
- Requirements
- Experience working as an ASIC/SoC design engineer.
-
- Location
- Kanagawa
-
- Work Style
- Remote working possible, Flex working possible
-
- Salary
- ¥6,000,000~¥10,000,000
-
- Attractive
Points - Japanese company with global opportunities, Listed company, No relocation, New graduates welcome, Overseas communication, Foreign capital company, Weekends and holidays off, Make use of languages
- Attractive
Consultation
We are available to discuss
career change and career planning in the automotive and mobility industry,
and
job selection.
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