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- Logic Circuit Design Engineer
JOB ID 26849
Logic Circuit Design Engineer
- IT, Software platform
- Semiconductor, Research & Development, Circuit & Mounting Design, Electrical & electronic control design
- Tokyo
- ¥5,000,000~¥10,000,000
The company provides high-performance graphics and AI processing solutions and is a leader in automotive, robotics, entertainment, and other fields. Smart, immersive experiences.
Increased number of ASIC development front-end engineers due to increased inquiries for semiconductor product development
Job Description
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- Responsibilities
- AI and image processing processor design: Develop hardware IP for AI and image processors at the logic level. Use design languages (Verilog, SystemVerilog, etc.) to optimize design for high performance and low power consumption.
SoC architecture design: Integrate multiple IPs and design the overall structure combining CPU cores, memory and interfaces.
ASIC design and development: From specification design micro-architecture design, and logic design to advance chip design.
Team Collaboration: Collaborate with software development team and external partner companies to improve design and performance.
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- Requirements
- 7+ years of working experience in hardware IP design, SoC architecture design, and ASIC design using RTL
Knowledge and working experience in logic synthesis, timing closure, and PPA (Power, Performance, Area) optimization
C, C++, Python, for verification efficiency Hands-on experience with simple software programming such as shell scripting
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- Preferred
- Experience in developing advanced SoCs for AI, GPU, image processing, video decoders, etc. that require high-speed processing of large numbers of operations
Experience in developing hardware IP for high-speed processing of algorithms
Knowledge and experience with interconnect and bus architecture
Verification utilizing emulators and FPGA (including OS and test
Knowledge and experience with high-speed interfaces such as DRAM, PCIexpress, USB, HDMI, DisplayPort, MIPI
Experience with asynchronous path verification, assertion-based verification, formal verification
Knowledge and experience with DFT (BIST, SCAN)
Experience negotiating requirement specifications and explaining development deliverables
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- Location
- Tokyo
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- Work Style
- Remote working possible, Flex working possible
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- Salary
- ¥5,000,000~¥10,000,000
-
- Attractive
Points - No relocation, Childcare support system, Overseas communication, Weekends and holidays off, Make use of languages
- Attractive
Consultation
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- IP Development Design Engineer